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PARA
Real-time video coding over parallel architectures

The PARA project aims at studying and developing optimization techniques for enhanced parallel computing. The target architectures are based on new generation general-purpose processors or on more specialized chips (graphic processors, Cell processor, APE). Specifically, it is proposed to tightly couple micro-benchmarking techniques with adaptive code generation methods. Performance evaluation is based on reference source codes for computational simulation (fluid mechanics, bioinformatics, geophysics, theoretical physics) and cryptanalysis.

PARA also contributes to the popular trend to extend the use of task parallelism (multicore / multithread processors, NUMA multiprocessors systems) by investigating code analysis techniques and tools for detecting hidden parallelism in seemingly sequential applications, and by elaborating efficient code for managing multiple processes.

A last research track concerns the relevance and feasibility of hardware accelerators tailored to selected applications.

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TickPartners   Bull - CAPS Entreprise - IFP - INRIA - IRISA - CAPS - IRISA - Symbiose - Laboratoire de Physique Théorique - Université Versailles Saint-Quentin-en-Yvelines
TickKeywords   Compression - High-performance computing - MPEG-4
TickContact point   Marius Preda

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